Simulation and optimization of digital circuits : considering and mitigating destabilizing factors 1st ed.

Author

• Melikyan, Vazgen

Additional Author(s)

-

Publisher

Cham, Switzerland : Springer International Publishing, 2018

Language

English

ISBN

9783319716374

Series

Subject(s)

• ELECTRONIC CIRCUITS
• LOGIC DESIGN
• MICROPROCESSORS

Notes

. .

Abstract

This book describes new, fuzzy logic-based mathematical apparatus, which enable readers to work with continuous variables, while implementing whole circuit simulations with speed, similar to gate-level simulators and accuracy, similar to circuit-level simulators. The author demonstrates newly developed principles of digital integrated circuit simulation and optimization that take into consideration various external and internal destabilizing factors, influencing the operation of digital ICs. The discussion includes factors including radiation, ambient temperature, electromagnetic fields, and climatic conditions, as well as non-ideality of interconnects and power rails.
Discusses the construction of a new class of simulators that takes into account various internal and external destabilizing effects on the operation of digital integrated circuits;
Includes detailed explanation of key topics, including models, algorithms, and characteristics of software development;
Focuses on issues pertaining currently to development of real integrated circuits.

Physical Dimension

Number of Page(s)

1 online resource (xiv, 365 p.)

Dimension

-

Other Desc.

ill. (in col.)

Summary / Review / Table of Content

Introduction --
General issues of gate-level simulation and optimization of digital circuits with consideration of DF --
Models of logical elements for DF consideration -- Models for determining the influence of DF --
Algorithmic implementation of the automated system of gate-level simulation of digital circuits with consideration of DF --
Optimization of digital circuits with consideration of DF --
Linguistic and software development of the automated system of gate-level simulation of digital circuits with consideration of DF.

Exemplar(s)

#	Accession No.	Call Number	Location	Status
1.	00519/20	621.3815 Mel S	Online !	Available